一种用于低压工作的新型10T SRAM单元

2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2012-09-05 DOI:10.1109/MWSCAS.2012.6292120

In-Seok Jung, Yong-Bin Kim, F. Lombardi

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引用次数: 51

摘要

本文提出了两种具有高静态噪声裕度(SNM)的软误差硬化10T SRAM单元，用于低压工作。与以往的工作相比，所提出的NMOS堆叠SRAM单元在亚阈值区域附近具有更高的读SNM，工作正常。采用0.18um标准CMOS工艺的仿真结果表明，在单事件瞬态(SET)下，NMOS堆叠- 10t电池具有高读SNM和高软误差弹性，比未受保护的标准6T SRAM电池高至少100倍。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A novel sort error hardened 10T SRAM cells for low voltage operation

In this paper, two types of a soft error hardened 10T SRAM cells with high static noise margin (SNM) are proposed for low voltage operation. The proposed NMOS stacked SRAM cell operates normally with higher read SNM near to sub-threshold region compared to prior works. Simulated results using 0.18um standard CMOS process demonstrate that proposed NMOS stacked-10T cell has high read SNM and high soft error resilience of at least 100 times higher than unprotected standard 6T SRAM cell for a single event transient (SET).

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来源期刊

2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)

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