电压和电流测试的实际缺陷覆盖率

Digest of Papers 1996 IEEE International Workshop on IDDQ Testing Pub Date : 1996-10-24 DOI:10.1109/IDDQ.1996.557798

F. Peters, S. Oostdijk

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引用次数: 11

摘要

本文介绍了通过缺陷仿真获得的Philips数字CMOS专用集成电路库中电压和电流测量的真实缺陷覆盖率。该分析是为了研究通过缺陷检测表最小化电压和电流测试方法之间的重叠。结果表明，电压测量的缺陷覆盖率较低，缺陷电阻对电压可检测性和可能的重叠产生主要影响。

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Realistic defect coverages of voltage and current tests

This paper presents the realistic defect coverage of voltage and current measurements on a Philips digital CMOS ASIC library obtained by defect simulation. This analysis was made to study the minimisation of overlap between voltage and current based test methods by means of defect detection tables. Results show a poor defect coverage of voltage measurements and the major influence of the defect resistance on the voltage detectability and the possible overlap.

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Digest of Papers 1996 IEEE International Workshop on IDDQ Testing

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