VLSI design of energy efficient computational centric smart objects for IoT

Traditional standalone embedded system and its computational elements firmly connect with physical entities such as Input-Output devices and sensor networks in IoT applications such as medical monitoring, smart grids, smart cities, environmental monitoring systems which are gaining attraction among institutions and industries. A huge quantity of sensors are added to the IoT, and the processing of a large amount of data coming from Input-Output devices and sensor networks increases the energy consumption. To have more efficiency, the mobility of IoT based system requires low energy consumption. Smart devices perform the data offloading to external devices with increased communication effort, and this effort contribute to the overall power consumption of the smart devices. This power hungry nature of the communication infrastructure and computational resources using cloud computing is not very much suitable to design the future computational system. This nature changed the trend to shift the smartness of the things more adjacent to the things themselves and network edge (FoG) instead of towards the cloud. This shift can improve the computing capacity of the smart objects and limit energy consumption. This paper aims at exploring emerging approaches, ideas, and contributions to address the challenges in the design of energy efficient computational centric smart objects for IoT. A proposed energy-efficient Network on Chip (NoC) architecture for embedded high-performance computing is provided.