{"title":"一种有效的多阶段测试技术,可以通过容错来完美地防止可接受故障的过度检测,从而实现良率的最佳提高","authors":"Tong-Yu Hsieh, Kuen-Jong Lee, M. Breuer","doi":"10.1109/VDAT.2009.5158143","DOIUrl":null,"url":null,"abstract":"In many multimedia applications, some faults induce errors that are user-imperceptible and thus are acceptable. By not testing for these faults, the effective yield can be significantly increased based on the principle of error-tolerance. However, studies have shown that test patterns generated by a conventional ATPG procedure targeting only unacceptable faults also detect many acceptable faults, resulting in a significant degradation in achievable yield improvement. In this paper we present a multi-phase test technique that can perfectly prevent this over-detection problem. Solid theoretical derivations are provided to validate the effectiveness of this technique. Compared with previous work, only a much smaller number of test patterns are required and thus the required test cost can be much lower. Experimental results on benchmark circuits illustrate the high efficiency of this novel technique.","PeriodicalId":246670,"journal":{"name":"2009 International Symposium on VLSI Design, Automation and Test","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An efficient multi-phase test technique to perfectly prevent over-detection of acceptable faults for optimal yield improvement via error-tolerance\",\"authors\":\"Tong-Yu Hsieh, Kuen-Jong Lee, M. Breuer\",\"doi\":\"10.1109/VDAT.2009.5158143\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In many multimedia applications, some faults induce errors that are user-imperceptible and thus are acceptable. By not testing for these faults, the effective yield can be significantly increased based on the principle of error-tolerance. However, studies have shown that test patterns generated by a conventional ATPG procedure targeting only unacceptable faults also detect many acceptable faults, resulting in a significant degradation in achievable yield improvement. In this paper we present a multi-phase test technique that can perfectly prevent this over-detection problem. Solid theoretical derivations are provided to validate the effectiveness of this technique. Compared with previous work, only a much smaller number of test patterns are required and thus the required test cost can be much lower. Experimental results on benchmark circuits illustrate the high efficiency of this novel technique.\",\"PeriodicalId\":246670,\"journal\":{\"name\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2009.5158143\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2009.5158143","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An efficient multi-phase test technique to perfectly prevent over-detection of acceptable faults for optimal yield improvement via error-tolerance
In many multimedia applications, some faults induce errors that are user-imperceptible and thus are acceptable. By not testing for these faults, the effective yield can be significantly increased based on the principle of error-tolerance. However, studies have shown that test patterns generated by a conventional ATPG procedure targeting only unacceptable faults also detect many acceptable faults, resulting in a significant degradation in achievable yield improvement. In this paper we present a multi-phase test technique that can perfectly prevent this over-detection problem. Solid theoretical derivations are provided to validate the effectiveness of this technique. Compared with previous work, only a much smaller number of test patterns are required and thus the required test cost can be much lower. Experimental results on benchmark circuits illustrate the high efficiency of this novel technique.