58nm沟槽DRAM技术

2006 International Electron Devices Meeting Pub Date : 2006-12-01 DOI:10.1109/IEDM.2006.346848

T. Tran, R. Weis, A. Sieck, T. Hecht, G. Aichmayr, M. Goldbach, P.-F. Wang, A. Thies, G. Wedler, J. Nuetzel, D. Wu, C. Eckl, R. Duschl, T.-M. Kuo, Ying-Tse Chiang, W. Mueller

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引用次数: 9

摘要

作者首次提出了针对58nm节点的沟槽DRAM技术的完整集成方案和512Mb产品数据。演示了扩展u形电池器件(EUD)、高性能支撑器件、金属-绝缘体-硅(MIS)/高k介电介质和金属嵌环(MIC)的沟槽电容器以及低k间层介电介质(ILD)等关键技术

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A 58nm Trench DRAM Technology

The authors present for the first time the full integration scheme and 512Mb product data for a trench DRAM technology targeting the 58nm node. The key technology enablers such as an extended U-shape cell device (EUD), high performance support devices, trench capacitor with metal-insulator-silicon (MIS)/high-k dielectric and metal-in-collar (MIC), and low-k inter-level dielectric (ILD) are demonstrated

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2006 International Electron Devices Meeting

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