分数n频率源的设计与实现

Cao Hui, Qu Yu, Zhang Peng
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引用次数: 0

摘要

本文设计了一种基于分数n锁相芯片ADF4193的发射机本振,本振在选择高鉴相频率的情况下实现了相对较小的频率步长,从而优化了系统相位噪声,有效地满足了无人机(UAV)数据链频率源的应用要求。实际测试和应用结果表明,与传统整数n分频系统相比,本振相位噪声降低10dB,锁相时间短,杂散低,具有较好的实用价值。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design and implementation of a fractional-N frequency source
A transmitter local oscillator based on the fractional-N PLL chip ADF4193 is designed in this paper, the local oscillator achieve a relatively small frequency step in the case of selecting high phase detector frequency, thus optimized the system phase noise, and effectively meet the application requirements of Unmanned Aerial Vehicle (UAV) data link frequency source. Compared with traditional integer-N divider system, the actual testing and application results show that the phase noise of the local oscillator reduced 10dB, and the system has short lock time, low spurious, good practical value.
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