一种用于ASIP的超快速混合仿真框架

Ji Qiu, Xiang Gao, Yifei Jiang, Xu Xiao
{"title":"一种用于ASIP的超快速混合仿真框架","authors":"Ji Qiu, Xiang Gao, Yifei Jiang, Xu Xiao","doi":"10.1109/ICECS.2011.6122373","DOIUrl":null,"url":null,"abstract":"ISS (Instruction Set Simulator) plays an important role in pre-silicon software development for ASIP. However, the speed of traditional simulation is too slow to effectively support full-scale software development. In this paper, we propose a hybrid simulation framework which further improves the previous simulation methods by aggressively utilizing the host machine resources. The utilization is achieved by categorizing instructions of ASIP application into two types, namely custom and basic instructions, via binary instrumentation. Then in a way of hybrid simulation, only custom instructions are simulated on the ISS and basic instructions are executed fast and natively on the host machine. We implement this framework for an industrial ASIP to validate our approach. Experimental results show that when the implemented ISS, namely GS-Sim, is applied to practical multimedia decoders, an average simulation speed up to 1058.5MIPS can be achieved, which is 34.7 times of the state-of-art dynamic binary translation simulator and is the fastest to the best of our knowledge.","PeriodicalId":251525,"journal":{"name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An ultra-fast hybrid simulation framework for ASIP\",\"authors\":\"Ji Qiu, Xiang Gao, Yifei Jiang, Xu Xiao\",\"doi\":\"10.1109/ICECS.2011.6122373\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"ISS (Instruction Set Simulator) plays an important role in pre-silicon software development for ASIP. However, the speed of traditional simulation is too slow to effectively support full-scale software development. In this paper, we propose a hybrid simulation framework which further improves the previous simulation methods by aggressively utilizing the host machine resources. The utilization is achieved by categorizing instructions of ASIP application into two types, namely custom and basic instructions, via binary instrumentation. Then in a way of hybrid simulation, only custom instructions are simulated on the ISS and basic instructions are executed fast and natively on the host machine. We implement this framework for an industrial ASIP to validate our approach. Experimental results show that when the implemented ISS, namely GS-Sim, is applied to practical multimedia decoders, an average simulation speed up to 1058.5MIPS can be achieved, which is 34.7 times of the state-of-art dynamic binary translation simulator and is the fastest to the best of our knowledge.\",\"PeriodicalId\":251525,\"journal\":{\"name\":\"2011 18th IEEE International Conference on Electronics, Circuits, and Systems\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 18th IEEE International Conference on Electronics, Circuits, and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2011.6122373\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2011.6122373","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

指令集模拟器在ASIP的预硅软件开发中起着重要的作用。然而,传统的仿真速度太慢,无法有效地支持全面的软件开发。在本文中,我们提出了一种混合仿真框架,通过积极利用主机资源,进一步改进了以前的仿真方法。通过二进制检测,将ASIP应用程序的指令分为自定义指令和基本指令两种类型,从而实现了对ASIP应用程序的利用。然后采用混合仿真的方式,在国际空间站上只模拟自定义指令,在主机上快速本地执行基本指令。我们为一个工业ASIP实现这个框架来验证我们的方法。实验结果表明,将实现的ISS即GS-Sim应用于实际的多媒体解码器中,平均模拟速度可达1058.5MIPS,是目前最先进的动态二进制转换模拟器的34.7倍,是目前所知的最快的模拟速度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An ultra-fast hybrid simulation framework for ASIP
ISS (Instruction Set Simulator) plays an important role in pre-silicon software development for ASIP. However, the speed of traditional simulation is too slow to effectively support full-scale software development. In this paper, we propose a hybrid simulation framework which further improves the previous simulation methods by aggressively utilizing the host machine resources. The utilization is achieved by categorizing instructions of ASIP application into two types, namely custom and basic instructions, via binary instrumentation. Then in a way of hybrid simulation, only custom instructions are simulated on the ISS and basic instructions are executed fast and natively on the host machine. We implement this framework for an industrial ASIP to validate our approach. Experimental results show that when the implemented ISS, namely GS-Sim, is applied to practical multimedia decoders, an average simulation speed up to 1058.5MIPS can be achieved, which is 34.7 times of the state-of-art dynamic binary translation simulator and is the fastest to the best of our knowledge.
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