45nm SOI-CMOS中28ghz高线性LNA的设计与测量

2021 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS) Pub Date : 2021-11-01 DOI:10.1109/comcas52219.2021.9629091

V. Lammert, P. Sakalas, A. Werthof, R. Weigel, V. Issakov

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引用次数: 3

摘要

本工作展示了采用Globalfoundries 45nm RFSOI CMOS技术实现的28 GHz低噪声放大器的设计和测量。增强线性的概念是基于改进的导数叠加法。给出的测量结果证实，在1.8 V电源电压下，IIP3高达10 dBm，功率增益为9 dB，噪声系数为3.1 dB，总功耗为34 mW。放大器拓扑是围绕一个电感退化，差分级联放大器与平衡和GSG焊盘在输入和输出端口。在本文中，我们扩展了之前的研究成果，提供了更深入的设计见解，以及实验验证和测量结果与仿真的比较。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Design and measurements of a 28 GHz High-Linearity LNA in 45nm SOI-CMOS

This work shows the design and measurements of a 28 GHz low-noise amplifier, realized in Globalfoundries 45nm RFSOI CMOS technology. The enhanced linearity concept is based on the modified derivative superposition method. The presented measurements confirm a high IIP3 of 10 dBm, a power gain of 9 dB, a noise figure of 3.1 dB, and a total power consumption 34 mW from a 1.8 V supply voltage. The amplifier topology is built around an inductively degenerated, differential cascode amplifier with baluns and GSG pads at the input and output ports. In this paper, we extend our previous research results by providing deeper design insight, as well as experimental verification and comparison of the measurement results with the simulations.

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来源期刊

2021 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)

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