实现CNN通用机的仿真数字架构

1998 Fifth IEEE International Workshop on Cellular Neural Networks and their Applications. Proceedings (Cat. No.98TH8359) Pub Date : 1998-04-14 DOI:10.1109/CNNA.1998.685378

Á. Zarándy, P. Keresztes, T. Roska, P. Szolgay

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引用次数: 18

摘要

描述了一种仿真数字VLSI CMOS架构，其主要特征如下:(i)可变精度，(ii)完整的CNN通用机器在硅上，(iii)良好的面积时间权衡。在VHDL上定义了整个体系结构，并计算了实现的以下关键参数:(1)速度(1 ns/虚拟单元/迭代);(2)采用0.35 /spl mu/m三金属层CMOS技术，每cm/sup 2/的物理处理单元数为24。

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An emulated digital architecture implementing the CNN Universal Machine

An emulated digital VLSI CMOS architecture is described, where the main features are as follows: (i) variable accuracy, (ii) a complete CNN Universal Machine on the silicon, (iii) a good area time trade off. The whole architecture was defined on VHDL and the following key parameters of the implementation were computed namely, (i) the speed (1 ns/virtual cell/iteration), (ii) the number of the physical processing cells per cm/sup 2/ is 24 by using 0.35 /spl mu/m three metal layer CMOS technology.

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来源期刊

1998 Fifth IEEE International Workshop on Cellular Neural Networks and their Applications. Proceedings (Cat. No.98TH8359)

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