可植入射频电路的低功耗CMOS稳压器结构

Li-Dyi Luo, K. D. Gannes, K. Fricke, S. Senjuti, R. Sobot
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引用次数: 10

摘要

我们提出了一种低功耗稳压器的设计架构,其中包括一个电荷泵和一个带隙电压基准,采用CMOS 130nm技术。该直流稳压器旨在用于射频集成电路能量收集应用,并为可植入电子设备供电进行了优化。内部电路部分在1.5V至1.9V(最坏情况)的本地电源电压水平下工作,3.96uW带隙产生462mVDC参考电压。整个稳压器自身运行通常消耗18uW,同时在满载条件下提供0.14%变化范围内的稳压V(PWR)=1V电压,即I(PWR)(最大)=4mA电流。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Low-Power CMOS Voltage Regulator Architecture for Implantable RF Circuits
We present design architecture of a low--power voltage regulator that includes a charge--pump and a band gap voltage reference in CMOS 130nm technology. The DC regulator is intended for RF IC energy harvesting applications and optimized for powering implantable electronics. The internal circuit sections work with the local power supply voltage levels in the 1.5V to 1.9V range (worst case), and the 3.96uW band gap generates 462mVDC reference voltage. The complete regulator consumes typically 18uW for its own operation while delivering regulated V(PWR)=1V voltage within 0.14% variation under full load conditions, i.e. I(PWR)(max)=4mA current.
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