微阵列数据分析中k -均值聚类算法的加速VLSI方法

Ila Roy Saxena, Vikas Pathak, M. Choudhary, Himanshu
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引用次数: 0

摘要

为了加快k-means聚类算法在微阵列数据分析中的执行速度,本文提出了一种并行和流水线架构。通过计算算法在XILINX ISE 14.4和MATLAB上运行的计算时间,验证了这一点。MATLAB仿真的计算时间为14.2390ms,而VLSI仿真的计算时间为0.0754ms,因此VLSI仿真比MATLAB仿真快188倍。并将所提功的计算时间为0.0754 ms,与之前的0.5891 ms进行了比较,发现所提功的计算时间比之前的快了7倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Accelerated VLSI Approach for K-Means Clustering Algorithm for the application of Microarray Data Analysis
This paper proposed a parallel and pipelined architecture for faster execution of k-means clustering algorithm for microarray data analysis. This is verified by calculating the computational time of algorithm when run on XILINX ISE 14.4 and MATLAB. The computational time taken by MATLAB simulation it is 14.2390ms while for VLSI simulation is found to be 0.0754ms hence VLSI simulation is 188 times faster than MATLAB Simulation. Also, computational time of proposed work which is 0.0754 ms, is compared with the previous work time which is 0.5891 ms and it is found that proposed work is 7 times faster than previous work.
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