{"title":"模拟电路拓扑建模的增量符号构造","authors":"Hanbin Hu, G. Shi, Yan Zhu","doi":"10.1109/ASICON.2013.6811928","DOIUrl":null,"url":null,"abstract":"Symbolic methods for analog circuit analysis and modeling have been well studied. However, little is known on how to create symbolic models incrementally while a circuit topology is being modified. This paper proposes an incremental symbolic construction method applicable to incremental circuit topology change based on a previously developed data structure called GPDD (graph-pair decision diagram). An incremental GPDD algorithm (iGPDD) is proposed. It is demonstrated experimentally that with proper symbol ordering the iGPDD method outperforms the restarted GPDD construction method.","PeriodicalId":150654,"journal":{"name":"2013 IEEE 10th International Conference on ASIC","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Incremental symbolic construction for topological modeling of analog circuits\",\"authors\":\"Hanbin Hu, G. Shi, Yan Zhu\",\"doi\":\"10.1109/ASICON.2013.6811928\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Symbolic methods for analog circuit analysis and modeling have been well studied. However, little is known on how to create symbolic models incrementally while a circuit topology is being modified. This paper proposes an incremental symbolic construction method applicable to incremental circuit topology change based on a previously developed data structure called GPDD (graph-pair decision diagram). An incremental GPDD algorithm (iGPDD) is proposed. It is demonstrated experimentally that with proper symbol ordering the iGPDD method outperforms the restarted GPDD construction method.\",\"PeriodicalId\":150654,\"journal\":{\"name\":\"2013 IEEE 10th International Conference on ASIC\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE 10th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASICON.2013.6811928\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 10th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON.2013.6811928","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Incremental symbolic construction for topological modeling of analog circuits
Symbolic methods for analog circuit analysis and modeling have been well studied. However, little is known on how to create symbolic models incrementally while a circuit topology is being modified. This paper proposes an incremental symbolic construction method applicable to incremental circuit topology change based on a previously developed data structure called GPDD (graph-pair decision diagram). An incremental GPDD algorithm (iGPDD) is proposed. It is demonstrated experimentally that with proper symbol ordering the iGPDD method outperforms the restarted GPDD construction method.