内存约束下的嵌入式系统综合

Proceedings of the Seventh International Workshop on Hardware/Software Codesign (CODES'99) (IEEE Cat. No.99TH8450) Pub Date : 1999-03-01 DOI:10.1145/301177.301526

J. Madsen, P. Bjørn-Jørgensen

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引用次数: 12

摘要

本文提出了一种遗传算法，用于解决将时间约束的单速率系统规范映射到可能包含不规则互连结构的给定异构体系结构上的系统综合问题。综合是在内存约束下进行的，也就是说，该算法考虑了处理器的内存大小和通信链路的接口缓冲区大小，特别是它们之间复杂的相互作用。该算法作为LY-COS共合成系统的一部分实现。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Embedded system synthesis under memory constraints

This paper presents a genetic algorithm to solve the system synthesis problem of mapping a time constrained single-rate system specification onto a given heterogeneous architecture which may contain irregular interconnection structures. The synthesis is performed under memory constraints, that is, the algorithm takes into account the memory size of processors and the size of interface buffers of communication links, and in particular the complicated interplay of these. The presented algorithm is implemented as part of the LY-COS cosynthesis system.

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来源期刊

Proceedings of the Seventh International Workshop on Hardware/Software Codesign (CODES'99) (IEEE Cat. No.99TH8450)

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