{"title":"无人机SAR实时成像算法的FPGA实现","authors":"Jiaqi Pan, Zhaoyang Zeng, Hui Wang, Wei Hua, Sili Wu","doi":"10.23919/CISS51089.2021.9652219","DOIUrl":null,"url":null,"abstract":"This paper puts forward a valid method to design the Unmanned Aerial Vehicle (UAV) Synthetic Aperture Radar (SAR) real-time imaging processor based on FPGA, a block-wise Phase Gradient Autofocus (PGA)[4],[5] is used to correct the space-variant phase error. The architecture of this processor designs with both fixed point operation and floating point operation to reduce hardware resource, also designs with both pipeline process and parallel process to reduce process time. Experiment results show that system works at 100MHz can process 512MB SAR raw data within about 8 seconds. The good experimental image also proves the validity and reliability of the proposed system.","PeriodicalId":318218,"journal":{"name":"2021 2nd China International SAR Symposium (CISS)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An FPGA Implementation of UAV SAR Real-time Imaging Algorithm\",\"authors\":\"Jiaqi Pan, Zhaoyang Zeng, Hui Wang, Wei Hua, Sili Wu\",\"doi\":\"10.23919/CISS51089.2021.9652219\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper puts forward a valid method to design the Unmanned Aerial Vehicle (UAV) Synthetic Aperture Radar (SAR) real-time imaging processor based on FPGA, a block-wise Phase Gradient Autofocus (PGA)[4],[5] is used to correct the space-variant phase error. The architecture of this processor designs with both fixed point operation and floating point operation to reduce hardware resource, also designs with both pipeline process and parallel process to reduce process time. Experiment results show that system works at 100MHz can process 512MB SAR raw data within about 8 seconds. The good experimental image also proves the validity and reliability of the proposed system.\",\"PeriodicalId\":318218,\"journal\":{\"name\":\"2021 2nd China International SAR Symposium (CISS)\",\"volume\":\"64 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-11-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 2nd China International SAR Symposium (CISS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/CISS51089.2021.9652219\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 2nd China International SAR Symposium (CISS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/CISS51089.2021.9652219","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An FPGA Implementation of UAV SAR Real-time Imaging Algorithm
This paper puts forward a valid method to design the Unmanned Aerial Vehicle (UAV) Synthetic Aperture Radar (SAR) real-time imaging processor based on FPGA, a block-wise Phase Gradient Autofocus (PGA)[4],[5] is used to correct the space-variant phase error. The architecture of this processor designs with both fixed point operation and floating point operation to reduce hardware resource, also designs with both pipeline process and parallel process to reduce process time. Experiment results show that system works at 100MHz can process 512MB SAR raw data within about 8 seconds. The good experimental image also proves the validity and reliability of the proposed system.