基于Goertzel算法的现场可编程门阵列电功率测量设计

F. W. Wibowo, Wihayati
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引用次数: 1

摘要

现场可编程门阵列(fpga)作为硬件平台在数字信号处理中仍然发挥着重要作用。这是因为FPGA对其组件并行的处理速度和任务分配有比较强的影响。本文旨在应用Goertzel算法设计一个基于硬件的功率计,在这种情况下,使用FPGA。本设计中使用的FPGA重构语言是非常高速的集成电路硬件描述语言(VHDL)。设计结果由模拟捕获电路控制器、实现Goertzel算法的DSP模块和DAC三个顶层模块组成。模拟捕获电路控制器模块有三种输入类型和九种输出类型。而DSP模块有四种输入类型和四种输出类型,DAC模块有四种输入类型和六种输出类型。该功率计的设计产生的平均功率因数为0.96。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Field Programmable Gate Arrays-Based Design of Electrical Power Measurement using Goertzel Algorithm
Using field programmable gate arrays (FPGAs) as a hardware platform still plays a significant role in digital signal processing. It is because the FPGA has a relatively strong influence on the processing speed and task distribution of its components in parallel. This paper aims to design a hardware-based power meter by applying the Goertzel algorithm, in this case, using an FPGA. The FPGA reconfiguration language used in this design is very high-speed integrated circuit hardware description language (VHDL). The design results that have been synthesized are three top-level modules consisting of an analog capture circuit controller, a DSP module that implements the Goertzel algorithm, and a DAC. The analog capture circuit controller module has three input types and nine output types. While DSP modules have four input types and four output types, and DAC modules have four input types and six output types. The design of this power meter produced an average power factor of 0.96.
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