4H-SiC沟槽MOSFET最佳结构的确定

S. Harada, M. Kato, T. Kojima, K. Ariyoshi, Y. Tanaka, H. Okumura
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引用次数: 39

摘要

4H-SiC UMOSFET的一个关键问题是在阻塞状态下对沟槽栅极底部的栅极氧化物进行屏蔽,使其免受高电场的影响。本研究采用二维数值器件模拟的方法,在栅极氧化物中开发了具有低比导通电阻和低电场的UMOSFET结构。在不降低导通电阻的情况下,埋入p基区域的结构成功地降低了栅氧化场。此外,还提出了适用于埋置p基区的两区超结结构。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Determination of optimum structure of 4H-SiC Trench MOSFET
A critical issue for the 4H-SiC UMOSFET is a shielding of the gate oxide at the bottom of the trench gate from the high electric field during the blocking state. This study develops the UMOSFET structure with low specific on-resistance and low electric field in the gate oxide by the two-dimensional numerical device simulation. The gate oxide field is successfully decreased without the degradation of the on-resistance by the structure with the buried p-base region. Furthermore, two-zone Superjunction structure that applies the buried p-base region is also proposed for the 3300 V device.
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