{"title":"多速率FIR滤波器的可扩展实现方案及其在子带滤波器组高效设计中的应用","authors":"Po-Cheng Wu, Liang-Gee Chen, T. Chiueh","doi":"10.1109/VLSISP.1995.527505","DOIUrl":null,"url":null,"abstract":"A scalable implementation scheme for multirate FIR filters in consideration of both the processing time and the silicon area is presented in this paper. According to our various requirements, the flexible and efficient implementation scheme can simultaneously reduce both the time cost T to 1/kT and the area cost A to k/MA (M is the decimation or interpolation rate, k is any factor of M). Furthermore, by employing the scalable implementation scheme, we also propose an efficient design technique for subband filter banks.","PeriodicalId":286121,"journal":{"name":"VLSI Signal Processing, VIII","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks\",\"authors\":\"Po-Cheng Wu, Liang-Gee Chen, T. Chiueh\",\"doi\":\"10.1109/VLSISP.1995.527505\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A scalable implementation scheme for multirate FIR filters in consideration of both the processing time and the silicon area is presented in this paper. According to our various requirements, the flexible and efficient implementation scheme can simultaneously reduce both the time cost T to 1/kT and the area cost A to k/MA (M is the decimation or interpolation rate, k is any factor of M). Furthermore, by employing the scalable implementation scheme, we also propose an efficient design technique for subband filter banks.\",\"PeriodicalId\":286121,\"journal\":{\"name\":\"VLSI Signal Processing, VIII\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"VLSI Signal Processing, VIII\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSISP.1995.527505\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Signal Processing, VIII","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSISP.1995.527505","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks
A scalable implementation scheme for multirate FIR filters in consideration of both the processing time and the silicon area is presented in this paper. According to our various requirements, the flexible and efficient implementation scheme can simultaneously reduce both the time cost T to 1/kT and the area cost A to k/MA (M is the decimation or interpolation rate, k is any factor of M). Furthermore, by employing the scalable implementation scheme, we also propose an efficient design technique for subband filter banks.