{"title":"一种鲁棒连续时间环滤波器PWM D类放大器，具有高线性度和良好的抗工艺变化能力","authors":"Hsin-Hong Hou, Chung-Wei Lin, Wentao Chen","doi":"10.1109/ASSCC.2009.5357224","DOIUrl":null,"url":null,"abstract":"This paper describes a robust PWM class D amplifier with high linearity and good immunity to process variations. By using the proposed adaptive triangular wave generator (ATG), 0.0042% THD+N and 99.2dB dynamic range is achieved in this design. The standard deviation of THD+N ratio over 22 samples can be smaller by 4 times compared to the results without the adaptive triangular wave generator. This chip integrates power MOS stages and 2 channel design. The supply voltage is from 3V to 5.5V and the die area is 2.45mm × 2.9mm.","PeriodicalId":263023,"journal":{"name":"2009 IEEE Asian Solid-State Circuits Conference","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A robust continuous time loop filter PWM class D amplifier with high linearity and good immunity to process variations\",\"authors\":\"Hsin-Hong Hou, Chung-Wei Lin, Wentao Chen\",\"doi\":\"10.1109/ASSCC.2009.5357224\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a robust PWM class D amplifier with high linearity and good immunity to process variations. By using the proposed adaptive triangular wave generator (ATG), 0.0042% THD+N and 99.2dB dynamic range is achieved in this design. The standard deviation of THD+N ratio over 22 samples can be smaller by 4 times compared to the results without the adaptive triangular wave generator. This chip integrates power MOS stages and 2 channel design. The supply voltage is from 3V to 5.5V and the die area is 2.45mm × 2.9mm.\",\"PeriodicalId\":263023,\"journal\":{\"name\":\"2009 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2009.5357224\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2009.5357224","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A robust continuous time loop filter PWM class D amplifier with high linearity and good immunity to process variations
This paper describes a robust PWM class D amplifier with high linearity and good immunity to process variations. By using the proposed adaptive triangular wave generator (ATG), 0.0042% THD+N and 99.2dB dynamic range is achieved in this design. The standard deviation of THD+N ratio over 22 samples can be smaller by 4 times compared to the results without the adaptive triangular wave generator. This chip integrates power MOS stages and 2 channel design. The supply voltage is from 3V to 5.5V and the die area is 2.45mm × 2.9mm.
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