{"title":"一种适用于滤波器的模拟电路内置自检结构","authors":"F. Amer","doi":"10.1109/NRSC.1996.551128","DOIUrl":null,"url":null,"abstract":"The aim of built-in-self test (BIST) is to increase the number of test points. But there is a tradeoff between the chip area and pin overhead. An alternative novel BIST for fault diagnosis and testing of analog circuits is presented to enhance the testability of the circuit under test. This novel technique minimizes the required test points to only input/output pins. Moreover, the technique consumes less chip area and monitors the obtained data with high speed.","PeriodicalId":127585,"journal":{"name":"Thirteenth National Radio Science Conference. NRSC '96","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A novel built-in-self test structure for analog circuits with application to filters\",\"authors\":\"F. Amer\",\"doi\":\"10.1109/NRSC.1996.551128\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The aim of built-in-self test (BIST) is to increase the number of test points. But there is a tradeoff between the chip area and pin overhead. An alternative novel BIST for fault diagnosis and testing of analog circuits is presented to enhance the testability of the circuit under test. This novel technique minimizes the required test points to only input/output pins. Moreover, the technique consumes less chip area and monitors the obtained data with high speed.\",\"PeriodicalId\":127585,\"journal\":{\"name\":\"Thirteenth National Radio Science Conference. NRSC '96\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-03-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Thirteenth National Radio Science Conference. NRSC '96\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NRSC.1996.551128\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Thirteenth National Radio Science Conference. NRSC '96","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NRSC.1996.551128","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel built-in-self test structure for analog circuits with application to filters
The aim of built-in-self test (BIST) is to increase the number of test points. But there is a tradeoff between the chip area and pin overhead. An alternative novel BIST for fault diagnosis and testing of analog circuits is presented to enhance the testability of the circuit under test. This novel technique minimizes the required test points to only input/output pins. Moreover, the technique consumes less chip area and monitors the obtained data with high speed.