{"title":"分数阶正弦振荡器,仅使用单个运算跨阻放大器","authors":"Manoj Kumar, D. Bhaskar, Pragati Kumar","doi":"10.1109/ICCCIS51004.2021.9397101","DOIUrl":null,"url":null,"abstract":"In this paper a fractional order sinusoidal oscillator (FSO) implemented with two fractional capacitors (FC), four resistors and a single operational trans-resistance amplifier (OTRA) has been presented. The characteristic equation of proposed fractional order oscillator has been derived using nodal analysis and the expressions for frequency of oscillation, condition of oscillation and phase difference between the output voltages are obtained. In one special case, when α = β = 1.0, the circuit behaves as a classical single resistance controlled sinusoidal oscillator (SRCO) in which the frequency of oscillation and the condition of oscillation can be varied through separate resistors. These properties are retained even when the value of α and β lie in the range of 0 < α, β < 1. Since the input terminals of OTRA are at virtually ground, the proposed oscillator circuit is also insensitive to parasitic input capacitances and input resistances. The workability of proposed structure has been verified with PSPICE simulation results using a single OTRA (constructed with CMOS transistors using TMSC 0.18 μm technology) and fractional capacitors realized using the method proposed by Valsa and Dovrak and Friedl.","PeriodicalId":316752,"journal":{"name":"2021 International Conference on Computing, Communication, and Intelligent Systems (ICCCIS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-02-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fractional Order Sinusoidal Oscillator Using only a Single Operational Trans-resistance Amplifier\",\"authors\":\"Manoj Kumar, D. Bhaskar, Pragati Kumar\",\"doi\":\"10.1109/ICCCIS51004.2021.9397101\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper a fractional order sinusoidal oscillator (FSO) implemented with two fractional capacitors (FC), four resistors and a single operational trans-resistance amplifier (OTRA) has been presented. The characteristic equation of proposed fractional order oscillator has been derived using nodal analysis and the expressions for frequency of oscillation, condition of oscillation and phase difference between the output voltages are obtained. In one special case, when α = β = 1.0, the circuit behaves as a classical single resistance controlled sinusoidal oscillator (SRCO) in which the frequency of oscillation and the condition of oscillation can be varied through separate resistors. These properties are retained even when the value of α and β lie in the range of 0 < α, β < 1. Since the input terminals of OTRA are at virtually ground, the proposed oscillator circuit is also insensitive to parasitic input capacitances and input resistances. The workability of proposed structure has been verified with PSPICE simulation results using a single OTRA (constructed with CMOS transistors using TMSC 0.18 μm technology) and fractional capacitors realized using the method proposed by Valsa and Dovrak and Friedl.\",\"PeriodicalId\":316752,\"journal\":{\"name\":\"2021 International Conference on Computing, Communication, and Intelligent Systems (ICCCIS)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-02-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 International Conference on Computing, Communication, and Intelligent Systems (ICCCIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCCIS51004.2021.9397101\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Computing, Communication, and Intelligent Systems (ICCCIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCIS51004.2021.9397101","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fractional Order Sinusoidal Oscillator Using only a Single Operational Trans-resistance Amplifier
In this paper a fractional order sinusoidal oscillator (FSO) implemented with two fractional capacitors (FC), four resistors and a single operational trans-resistance amplifier (OTRA) has been presented. The characteristic equation of proposed fractional order oscillator has been derived using nodal analysis and the expressions for frequency of oscillation, condition of oscillation and phase difference between the output voltages are obtained. In one special case, when α = β = 1.0, the circuit behaves as a classical single resistance controlled sinusoidal oscillator (SRCO) in which the frequency of oscillation and the condition of oscillation can be varied through separate resistors. These properties are retained even when the value of α and β lie in the range of 0 < α, β < 1. Since the input terminals of OTRA are at virtually ground, the proposed oscillator circuit is also insensitive to parasitic input capacitances and input resistances. The workability of proposed structure has been verified with PSPICE simulation results using a single OTRA (constructed with CMOS transistors using TMSC 0.18 μm technology) and fractional capacitors realized using the method proposed by Valsa and Dovrak and Friedl.