考虑节点连通性的BIST输入分组方法

Byung-Gu Choi, Yoon-Seok Chang, Dong-Wook Kim
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引用次数: 1

摘要

目前,以自动测试和高速测试为特点的测试策略是一种主要的测试策略。但是,BIST在硬件开销和消耗不切实际的测试时间(测试长度)方面存在显著问题;在CUT的情况下,它有大量的初级输入。本文提出了一种新的输入分组方法,该方法有助于减少测试长度。该方法通过考虑相对于内部节点的节点连通性来划分输入。为了达到这个目的,我们提出了一些测试点的定义,节点作为测试点的条件,以及在给定电路中寻找测试点的过程。将测试点应用于BIST结构,减少测试时间。实验结果表明,与使用伪随机模式的测试电路相比,基于该方法的BIST TPGs测试时间大大缩短。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Input grouping method considering nodal connectivity for BIST test time reduction
At present, BIST is a major test strategy with features of automatic test and possibility of at-speed test. But BIST has significant problems for hardware overhead and consumes impractical test time (test length); in the case of CUT it has a large number of primary inputs. We proposed a new method called input grouping which is helpful to reduce test length for BIST application. This method partitions inputs by considering nodal connectivity with respect to internal nodes. To achieve this purpose we proposed some definitions for test points, conditions for a node to be a test point, and a procedure to find test points in a given circuits. The test points were applied to form a BIST structure to reduce the test time. The experimental result showed that BIST TPGs based on this method achieves tremendous reduction in test time compared to the case using pseudorandom patterns for various example circuits.
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