FPGA-based acceleration of stereo matching using OpenCL

Stereo vision finds a wide range of applications for robot navigation, advanced driving support system, and autonomous driving in the automotive industry. The disparity map can be obtained through the implementation of stereo vision architecture using stereo matching. A stereo matching algorithm has recently been executed in FPGA. This study is aimed at assessing the stereo matching with the use of Stratix V FPGA and OpenCL framework. The latter refers to a parallel programming framework that enhances productivity by raising the code’s abstraction. Additionally, OpenCL allows for the processing of stereo matching using channel extensions. In the experiment, we partitioned the OpenCL kernel into three smaller kernels to examine the stereo matching on FPGA for computation. Such an approach enables streaming image pixels from the FPGA global memory. A line-buffer is employed to avoid the load-store dependencies caused by memory accesses when streaming the pixels to the window buffer inside the stereo matching kernel. We can achieve a rapid execution time, which is advantageous for real-time implementation, by streaming the image pixels through an OpenCL kernel partitioned using channel extension. The execution time to compute the disparity map using the stereo KITTI dataset with 1242x375 pixels resolution reaches 2.38 ms or 420 fps for 6x6 sliding window size, 2.44 ms or 409 fps for 7x7, and 2.52 ms or 396 fps for 8x8.