p沟道多晶硅电导率调制薄膜晶体管的实验表征

Proceedings of 5th Asian Symposium on Information Display. ASID '99 (IEEE Cat. No.99EX291) Pub Date : 1999-03-19 DOI:10.1109/ASID.1999.762764

Chunxiang Zhu, J. Sin, H. Kwok

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引用次数: 0

摘要

对p沟道多晶硅电导率调制薄膜晶体管(CMTFT)进行了演示和实验表征。晶体管在偏置区域使用电导率调制的概念，以显著降低导态电阻。在漏极电压范围为-15 V至-5 V的情况下，该结构可提供比传统偏置漏极TFT高1.5至2个数量级的导通电流，同时仍保持低漏电流和简单的器件操作。p通道CMTFT可以与n通道CMTFT组合形成CMOS高压驱动器，非常适合在完全集成的大面积电子应用中使用。

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Experimental characterization of p-channel polysilicon conductivity modulated thin-film transistors

A p-channel poly-Si CMTFT (Conductivity Modulated Thin-Film Transistor) is demonstrated and experimentally characterized. The transistor uses the concept of conductivity modulation in the offset region to obtain a significant reduction in on-state resistance. This structure can provide 1.5 to 2 orders of magnitude higher on-state current than that of the conventional offset drain TFT at drain voltage ranging from -15 V to -5 V while still maintaining low leakage current and simplicity in device operation. The p-channel CMTFT can be combined with the n-channel CMTFT to form CMOS high voltage drivers, which are very suitable for use in fully integrated large area electronic applications.

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Proceedings of 5th Asian Symposium on Information Display. ASID '99 (IEEE Cat. No.99EX291)

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