用于FMCW应用的SiGe BiCMOS技术W频段LNA, PA，八倍频器，混频器和收发器芯片组

2020 IEEE MTT-S International Wireless Symposium (IWS) Pub Date : 2020-09-20 DOI:10.1109/IWS49314.2020.9360021

Xu Cheng, Jiangan Han, Xianhu Luo, Liang Zhang, Fengjun Chen

{"title":"用于FMCW应用的SiGe BiCMOS技术W频段LNA, PA，八倍频器，混频器和收发器芯片组","authors":"Xu Cheng, Jiangan Han, Xianhu Luo, Liang Zhang, Fengjun Chen","doi":"10.1109/IWS49314.2020.9360021","DOIUrl":null,"url":null,"abstract":"This paper proposes an implementation of a chipset of LNA/PA/Octupler/Mixer and an integrated transceiver chip at W-band using a 0.13 μm SiGe BiCMOS technology. An active biasing scheme is utilized to improve the isolation specification between DC and RF ports and to minimize the power supply pads as well. What is more, a sandwiched slab power combiner topology is brought in to realize a wideband power amplifier. All prototype chips are fabricated in a 0.13 μm SiGe BiCMOS process with a minimum in-band noise figure of 4.8 dB for LNA and an in-band Psat of higher than 17.3 dBm for PA. The -3 dB bandwidth of the PA is larger than 70 GHz while that of LNA/Mixer is larger than 10 GHz. The output -3 dB bandwidth of the octupler is larger than 20 GHz. In addition, the integrated transceiver chip demonstrates a peak Psat of higher than 15 dBm and a mean noise figure of 9 dB with a bandwidth of 10 GHz and a power consumption of 750 mW.","PeriodicalId":301959,"journal":{"name":"2020 IEEE MTT-S International Wireless Symposium (IWS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Chip Set of LNA, PA, Octupler, Mixer and Transceiver at W band in SiGe BiCMOS Technology for FMCW Applications\",\"authors\":\"Xu Cheng, Jiangan Han, Xianhu Luo, Liang Zhang, Fengjun Chen\",\"doi\":\"10.1109/IWS49314.2020.9360021\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes an implementation of a chipset of LNA/PA/Octupler/Mixer and an integrated transceiver chip at W-band using a 0.13 μm SiGe BiCMOS technology. An active biasing scheme is utilized to improve the isolation specification between DC and RF ports and to minimize the power supply pads as well. What is more, a sandwiched slab power combiner topology is brought in to realize a wideband power amplifier. All prototype chips are fabricated in a 0.13 μm SiGe BiCMOS process with a minimum in-band noise figure of 4.8 dB for LNA and an in-band Psat of higher than 17.3 dBm for PA. The -3 dB bandwidth of the PA is larger than 70 GHz while that of LNA/Mixer is larger than 10 GHz. The output -3 dB bandwidth of the octupler is larger than 20 GHz. In addition, the integrated transceiver chip demonstrates a peak Psat of higher than 15 dBm and a mean noise figure of 9 dB with a bandwidth of 10 GHz and a power consumption of 750 mW.\",\"PeriodicalId\":301959,\"journal\":{\"name\":\"2020 IEEE MTT-S International Wireless Symposium (IWS)\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-09-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE MTT-S International Wireless Symposium (IWS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWS49314.2020.9360021\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE MTT-S International Wireless Symposium (IWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWS49314.2020.9360021","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

本文提出了一种采用0.13 μm SiGe BiCMOS技术的w波段LNA/PA/Octupler/Mixer芯片组和集成收发器芯片的实现方案。采用有源偏置方案来提高直流和射频端口之间的隔离规格，并最大限度地减少电源垫。在此基础上，提出了一种夹层板功率合成器拓扑结构，实现了宽带功率放大器。所有原型芯片均采用0.13 μm SiGe BiCMOS工艺制造，LNA的带内噪声系数最小为4.8 dB, PA的带内Psat高于17.3 dBm。PA的-3 dB带宽大于70 GHz, LNA/Mixer的-3 dB带宽大于10 GHz。八倍器输出- 3db带宽大于20ghz。此外，集成的收发器芯片显示峰值Psat高于15 dBm，平均噪声系数为9 dB，带宽为10 GHz，功耗为750 mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A Chip Set of LNA, PA, Octupler, Mixer and Transceiver at W band in SiGe BiCMOS Technology for FMCW Applications

This paper proposes an implementation of a chipset of LNA/PA/Octupler/Mixer and an integrated transceiver chip at W-band using a 0.13 μm SiGe BiCMOS technology. An active biasing scheme is utilized to improve the isolation specification between DC and RF ports and to minimize the power supply pads as well. What is more, a sandwiched slab power combiner topology is brought in to realize a wideband power amplifier. All prototype chips are fabricated in a 0.13 μm SiGe BiCMOS process with a minimum in-band noise figure of 4.8 dB for LNA and an in-band Psat of higher than 17.3 dBm for PA. The -3 dB bandwidth of the PA is larger than 70 GHz while that of LNA/Mixer is larger than 10 GHz. The output -3 dB bandwidth of the octupler is larger than 20 GHz. In addition, the integrated transceiver chip demonstrates a peak Psat of higher than 15 dBm and a mean noise figure of 9 dB with a bandwidth of 10 GHz and a power consumption of 750 mW.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2020 IEEE MTT-S International Wireless Symposium (IWS)

自引率

0.00%

发文量