28nm FDSOI平台,嵌入式PCM,适用于物联网,ULP,数字,模拟,汽车和其他应用

F. Arnaud, S. Haendler, S. Clerc, R. Ranica, A. Gandolfo, O. Weber
{"title":"28nm FDSOI平台,嵌入式PCM,适用于物联网,ULP,数字,模拟,汽车和其他应用","authors":"F. Arnaud, S. Haendler, S. Clerc, R. Ranica, A. Gandolfo, O. Weber","doi":"10.1109/ESSCIRC.2019.8902913","DOIUrl":null,"url":null,"abstract":"This paper proposes a general overview of Fully Depleted Silicon On Insulator (FDSOI) technology advantages leveraging body bias capability as a key enabler for digital, analog and memories performance enhancement. 2x total power contraction for digital designs has been demonstrating without any frequency degradation thanks to Forward Body Biasing (FBB), combined with 70% transistor variability reduction. Power of analog blocks has been strongly reduced with body bias technique while keeping trans-conductance efficiency increasing and output voltage gain. Finally, excellent memories performances has been achieved by applying FBB/RBB solution, dropping the leakage of unselected word-line in Phase Change Memory (PCM) array and improving Vmin operation for static RAM across a wide temperature range.","PeriodicalId":402948,"journal":{"name":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications\",\"authors\":\"F. Arnaud, S. Haendler, S. Clerc, R. Ranica, A. Gandolfo, O. Weber\",\"doi\":\"10.1109/ESSCIRC.2019.8902913\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a general overview of Fully Depleted Silicon On Insulator (FDSOI) technology advantages leveraging body bias capability as a key enabler for digital, analog and memories performance enhancement. 2x total power contraction for digital designs has been demonstrating without any frequency degradation thanks to Forward Body Biasing (FBB), combined with 70% transistor variability reduction. Power of analog blocks has been strongly reduced with body bias technique while keeping trans-conductance efficiency increasing and output voltage gain. Finally, excellent memories performances has been achieved by applying FBB/RBB solution, dropping the leakage of unselected word-line in Phase Change Memory (PCM) array and improving Vmin operation for static RAM across a wide temperature range.\",\"PeriodicalId\":402948,\"journal\":{\"name\":\"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)\",\"volume\":\"103 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2019.8902913\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2019.8902913","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文概述了利用体偏置能力作为数字、模拟和存储性能增强的关键推动者的完全耗尽绝缘体上硅(FDSOI)技术优势。由于前向体偏置(FBB),数字设计的总功率收缩了2倍,而没有任何频率降低,同时晶体管可变性降低了70%。体偏置技术大大降低了模拟模块的功率,同时保持了跨导效率的提高和输出电压的增益。最后,采用FBB/RBB解决方案,降低了相变存储器(PCM)阵列中未选择字线的泄漏,并改善了静态RAM在宽温度范围内的Vmin操作,从而获得了优异的存储性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications
This paper proposes a general overview of Fully Depleted Silicon On Insulator (FDSOI) technology advantages leveraging body bias capability as a key enabler for digital, analog and memories performance enhancement. 2x total power contraction for digital designs has been demonstrating without any frequency degradation thanks to Forward Body Biasing (FBB), combined with 70% transistor variability reduction. Power of analog blocks has been strongly reduced with body bias technique while keeping trans-conductance efficiency increasing and output voltage gain. Finally, excellent memories performances has been achieved by applying FBB/RBB solution, dropping the leakage of unselected word-line in Phase Change Memory (PCM) array and improving Vmin operation for static RAM across a wide temperature range.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信