Fast Parallel Radix Sort Using a Reconfigurable Mesh

In this paper, we present a parallel SIMD algorithm for radix sorting of N numbers of w bits each, taking O(w + N1/4) time with the VLSI area of O(N3/2 w2), 0 < w < N1/4. For w = log N, our algorithm improves a previous known solution on a similar architecture in time complexity by a factor of log N. Since our algorithm uses only radix sort for sorting of subsets and merging of them, no comparator is needed. Our algorithm satisfies the lower bound of AT2 complexity which mainly restricts the VLSI implementation of most sorting algorithms. The same result is obtained in another previously known solution, but it requires a comparator of size w.