{"title":"电子成像应用的集成电路设计","authors":"L. D'Luna","doi":"10.1109/ASIC.1989.123171","DOIUrl":null,"url":null,"abstract":"Electronic imaging places stringent demands on the signal processing circuitry for real-time operation. Dedicated processors that are algorithmic-specific are very attractive from speed, cost, and size considerations. The design of a digital image processing chip-set that falls in this domain is discussed. The design methodology, which includes circuit technologies for CMOS logic, memory, and datapath, together with the tools that ease layout, simulation, verification, and test, are described.<<ETX>>","PeriodicalId":245997,"journal":{"name":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","volume":"105 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design of integrated circuits for electronic imaging applications\",\"authors\":\"L. D'Luna\",\"doi\":\"10.1109/ASIC.1989.123171\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Electronic imaging places stringent demands on the signal processing circuitry for real-time operation. Dedicated processors that are algorithmic-specific are very attractive from speed, cost, and size considerations. The design of a digital image processing chip-set that falls in this domain is discussed. The design methodology, which includes circuit technologies for CMOS logic, memory, and datapath, together with the tools that ease layout, simulation, verification, and test, are described.<<ETX>>\",\"PeriodicalId\":245997,\"journal\":{\"name\":\"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,\",\"volume\":\"105 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-09-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1989.123171\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1989.123171","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of integrated circuits for electronic imaging applications
Electronic imaging places stringent demands on the signal processing circuitry for real-time operation. Dedicated processors that are algorithmic-specific are very attractive from speed, cost, and size considerations. The design of a digital image processing chip-set that falls in this domain is discussed. The design methodology, which includes circuit technologies for CMOS logic, memory, and datapath, together with the tools that ease layout, simulation, verification, and test, are described.<>