CNNP-v2:一种以内存为中心的高能效卷积神经网络处理器架构

Sungpill Choi, Kyeongryeol Bong, Donghyeon Han, H. Yoo
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引用次数: 6

摘要

针对可穿戴设备、物联网设备等智能设备,提出了一种高效节能的以内存为中心的卷积神经网络(CNN)处理器架构。为了实现高能效处理,它具有两个关键特征:首先,采用全分布式存储器架构的一维移位卷积pe实现3.1TOPS/W的能效。与传统架构相比,尽管它有大量并行的1024个MAC单元,但由于其完全本地路由的设计,它通过将电压降至0.46V来实现高能效。其次,完全可配置的二维网格核对核互连支持各种尺寸的输入特征,以最大限度地利用。该架构采用65nm CMOS工艺制作的16mm2芯片,在10MHz和0.48V下仅用9.4mW进行实时人脸识别。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CNNP-v2:An Energy Efficient Memory-Centric Convolutional Neural Network Processor Architecture
An energy efficient memory-centric convolutional neural network (CNN) processor architecture is proposed for smart devices such as wearable devices or internet of things (IoT) devices. To achieve energy-efficient processing, it has 2 key features: First, 1-D shift convolution PEs with fully distributed memory architecture achieve 3.1TOPS/W energy efficiency. Compared with conventional architecture, even though it has massively parallel 1024 MAC units, it achieve high energy efficiency by scaling down voltage to 0.46V due to its fully local routed design. Next, fully configurable 2-D mesh core-to-core interconnection support various size of input features to maximize utilization. The proposed architecture is evaluated 16mm2 chip which is fabricated with 65nm CMOS process and it performs real-time face recognition with only 9.4mW at 10MHz and 0.48V.
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