{"title":"标准数字CMOS技术下射频功率晶体管的设计","authors":"M. Tomáška, M. Krnac, R. Vazny","doi":"10.1109/ASDAM.2002.1088517","DOIUrl":null,"url":null,"abstract":"RF power transistor design in standard CMOS technology for the power amplifier in the frequency region of 1800MHz is key issue in this work. Transistor application in standard RF power amplifier topology is discussed in the sense of output power as well as power added efficiency. The RF CMOS power transistor layout is designed in Cadence Virtuoso layout editor using AustriaMicroSystems 0.35/spl mu/ CMOS technology. The RF power achieved at 50 Ohm load using designed transistor in class E power amplifier was 1 W at 1750 MHz with power added efficiency of 59.2% at 2.3V power supply voltage.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"RF power transistor design in standard digital CMOS technology\",\"authors\":\"M. Tomáška, M. Krnac, R. Vazny\",\"doi\":\"10.1109/ASDAM.2002.1088517\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"RF power transistor design in standard CMOS technology for the power amplifier in the frequency region of 1800MHz is key issue in this work. Transistor application in standard RF power amplifier topology is discussed in the sense of output power as well as power added efficiency. The RF CMOS power transistor layout is designed in Cadence Virtuoso layout editor using AustriaMicroSystems 0.35/spl mu/ CMOS technology. The RF power achieved at 50 Ohm load using designed transistor in class E power amplifier was 1 W at 1750 MHz with power added efficiency of 59.2% at 2.3V power supply voltage.\",\"PeriodicalId\":179900,\"journal\":{\"name\":\"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem\",\"volume\":\"68 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-12-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASDAM.2002.1088517\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASDAM.2002.1088517","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
RF power transistor design in standard digital CMOS technology
RF power transistor design in standard CMOS technology for the power amplifier in the frequency region of 1800MHz is key issue in this work. Transistor application in standard RF power amplifier topology is discussed in the sense of output power as well as power added efficiency. The RF CMOS power transistor layout is designed in Cadence Virtuoso layout editor using AustriaMicroSystems 0.35/spl mu/ CMOS technology. The RF power achieved at 50 Ohm load using designed transistor in class E power amplifier was 1 W at 1750 MHz with power added efficiency of 59.2% at 2.3V power supply voltage.