2003年IEEE存储器技术、设计和测试国际研讨会记录

Records of the 2003 International Workshop on Memory Technology, Design and Testing Pub Date : 1900-01-01 DOI:10.1109/MTDT.2003.1222353

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引用次数: 0

摘要

处理以下主题:特定应用的dram;成本最优嵌入式DRAM设计;针对DRAM缺陷的存储器测试生成;RAMs中的连断分析;缩短嵌入式ram的测试时间;嵌入式存储器的可测试性驱动优化器和封装器生成器ITRS商品路线图;硫系相变存储电池的电学仿真模型。

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Records of the 2003 IEEE International Workshop on Memory Technology, Design and Testing

The following topics are dealt with: application specific DRAMs; cost optimum embedded DRAM design; memory test generation for DRAM defects; linked faults analysis in RAMs; reducing test time of embedded SRAMs; testability-driven optimizer and wrapper generator for embedded memories; ITRS commodity roadmap; electrical simulation model for the Chalcogenide phase-change memory cell.

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Records of the 2003 International Workshop on Memory Technology, Design and Testing

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