A scalable and modular approach to verification of ATM switching system using reverse specification

This paper presents a methodology to verify very large and complex real-time software, such as ATM switching system. Due to the size and complexity, it is commonly very hard to understand and then verify the software. To overcome this problem, the methodology provides a scalable and modular approach to software understanding and verification. Firstly, an architecture of the software is constructed. The basic building block of the architecture is a Software Unit (SWU) which is hierarchically organized in the architecture. It guides understanding of the structural, functional, and behavioral views of the software at different abstraction levels. Secondly, there is a behavioral representation in the Real-time State Machine for Reverse Specification (RSMRS). RSMRS is constructed from SWU using reverse specification. RSMRS is further simulated and the simulation output is analyzed for verification. One of the most powerful characteristics of this approach is the capability of abstracting and exploding and verification information.