{"title":"正交调制器的数字上转换结构","authors":"P. Schaumont, S. Vernalde, M. Engels, I. Bolsens","doi":"10.1109/VLSISP.1996.558364","DOIUrl":null,"url":null,"abstract":"Traditionally, the digital implementation of modems is restricted to parts operating at the baseband frequency. At higher frequencies, roughly 30 MHz and beyond, analog technologies such as SAW filters provide a better power/performance figure. We show how this barrier can be broken by trading programmability for speed. Using a digital multirate filter structure that offers combined interpolation and frequency shifting, an area- and power efficient digital upconversion is achieved.","PeriodicalId":290885,"journal":{"name":"VLSI Signal Processing, IX","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Digital upconversion architecture for quadrature modulators\",\"authors\":\"P. Schaumont, S. Vernalde, M. Engels, I. Bolsens\",\"doi\":\"10.1109/VLSISP.1996.558364\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Traditionally, the digital implementation of modems is restricted to parts operating at the baseband frequency. At higher frequencies, roughly 30 MHz and beyond, analog technologies such as SAW filters provide a better power/performance figure. We show how this barrier can be broken by trading programmability for speed. Using a digital multirate filter structure that offers combined interpolation and frequency shifting, an area- and power efficient digital upconversion is achieved.\",\"PeriodicalId\":290885,\"journal\":{\"name\":\"VLSI Signal Processing, IX\",\"volume\":\"54 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"VLSI Signal Processing, IX\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSISP.1996.558364\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Signal Processing, IX","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSISP.1996.558364","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Digital upconversion architecture for quadrature modulators
Traditionally, the digital implementation of modems is restricted to parts operating at the baseband frequency. At higher frequencies, roughly 30 MHz and beyond, analog technologies such as SAW filters provide a better power/performance figure. We show how this barrier can be broken by trading programmability for speed. Using a digital multirate filter structure that offers combined interpolation and frequency shifting, an area- and power efficient digital upconversion is achieved.
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