A. Fayyaz, A. Castellazzi, G. Romano, M. Riccio, A. Irace, J. Urresti, N. Wright
{"title":"栅极偏置对SiC功率mosfet雪崩坚固性的影响","authors":"A. Fayyaz, A. Castellazzi, G. Romano, M. Riccio, A. Irace, J. Urresti, N. Wright","doi":"10.23919/ISPSD.2017.7988986","DOIUrl":null,"url":null,"abstract":"This paper investigates the effect of negative gate bias voltage (Vgs) on the avalanche breakdown robustness of commercial state-of-the-art silicon carbide (SiC) power MOSFETs. The device's ability to withstand energy dissipation during avalanche regime is a connoting figure of merit for all applications requiring load dumping and/or benefiting from snubber-less converter design. The superior material properties of SiC material means that SiC MOSFETs even at 1200V exhibit significant intrinsic avalanche robustness.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Influence of gate bias on the avalanche ruggedness of SiC power MOSFETs\",\"authors\":\"A. Fayyaz, A. Castellazzi, G. Romano, M. Riccio, A. Irace, J. Urresti, N. Wright\",\"doi\":\"10.23919/ISPSD.2017.7988986\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates the effect of negative gate bias voltage (Vgs) on the avalanche breakdown robustness of commercial state-of-the-art silicon carbide (SiC) power MOSFETs. The device's ability to withstand energy dissipation during avalanche regime is a connoting figure of merit for all applications requiring load dumping and/or benefiting from snubber-less converter design. The superior material properties of SiC material means that SiC MOSFETs even at 1200V exhibit significant intrinsic avalanche robustness.\",\"PeriodicalId\":202561,\"journal\":{\"name\":\"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/ISPSD.2017.7988986\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/ISPSD.2017.7988986","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Influence of gate bias on the avalanche ruggedness of SiC power MOSFETs
This paper investigates the effect of negative gate bias voltage (Vgs) on the avalanche breakdown robustness of commercial state-of-the-art silicon carbide (SiC) power MOSFETs. The device's ability to withstand energy dissipation during avalanche regime is a connoting figure of merit for all applications requiring load dumping and/or benefiting from snubber-less converter design. The superior material properties of SiC material means that SiC MOSFETs even at 1200V exhibit significant intrinsic avalanche robustness.