CPRring:一种结构感知的基于环的FPGA计算检查点架构

H. Vu, Shinya Takamaeda-Yamazaki, Takashi Nakada, Y. Nakashima
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引用次数: 0

摘要

在本文中,我们提出了一种新的fpga检查点架构以及一种有效的机制。然后,我们提供了原始HDL源代码的静态分析,以减少检查点功能的硬件成本。我们的评估表明,使用这些建议,检查点硬件对最大时钟频率的影响很小(小于10%)。LUT开销从14.4% (Dijkstra)到103.84%(矩阵乘法)不等。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CPRring: A Structure-Aware Ring-Based Checkpointing Architecture for FPGA Computing
In this paper, we present a new architecture forFPGA checkpointing along with an efficient mechanism. Wethen provide a static analysis of original HDL source code toreduce the cost of hardware for checkpointing functionality. Ourevaluations show that with the proposals, checkpointing hardwarecauses small degradation in maximum clock frequency (less than10%). The LUT overhead varies from 14.4% (Dijkstra) to 103.84%(Matrix Multiplication).
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