A Case for Common-Case: On FPGA Acceleration of Erasure Coding

Reliable storage is central component of data centers that support private or public cloud. Erasure coding has becoming increasingly popular alternative to replication for its capability in substantially cutting disk cost while delivering the same reliability. This paper reports the comprehensive results of using FPGA for accelerating erasure encoding and decoding algorithms. In particular, to accomplish the best efficiency in throughput delivered per thousand LUTs, we argue it is best to allocate more resources to the common-case, which we show can be more than 90%, while reducing performance target for the general-case. With further innovations, we show, as an example, that for a RS(10,4) erasure code, and a 1.3% disk failure probability, a 6Gb/s/KLUT can be accomplished for 5 nines of reliability. In terms of power efficiency, our design is able to achieve 40Gb/s/Watt.