{"title":"有效关键路径测试的危险感知定向过渡故障ATPG","authors":"V. Devanathan, Ishaan Santhosh Shah","doi":"10.1109/VLSID.2011.42","DOIUrl":null,"url":null,"abstract":"Aggressive speed and voltage binning schemes are widely used in the industry to combat process variation. Generating structural tests that are effective for speed and voltage binning is very important to reduce cost and improve quality. We observe that hazards are common along critical paths of many industrial designs and conventional path-delay ATPG is ineffective for paths with static hazards. We propose a directed transition fault ATPG scheme that works with commercial ATPG tools to test the critical paths with hazards. The proposed scheme is implemented on industrial designs and silicon results are presented.","PeriodicalId":371062,"journal":{"name":"2011 24th Internatioal Conference on VLSI Design","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-01-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Hazard-Aware Directed Transition Fault ATPG for Effective Critical Path Test\",\"authors\":\"V. Devanathan, Ishaan Santhosh Shah\",\"doi\":\"10.1109/VLSID.2011.42\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Aggressive speed and voltage binning schemes are widely used in the industry to combat process variation. Generating structural tests that are effective for speed and voltage binning is very important to reduce cost and improve quality. We observe that hazards are common along critical paths of many industrial designs and conventional path-delay ATPG is ineffective for paths with static hazards. We propose a directed transition fault ATPG scheme that works with commercial ATPG tools to test the critical paths with hazards. The proposed scheme is implemented on industrial designs and silicon results are presented.\",\"PeriodicalId\":371062,\"journal\":{\"name\":\"2011 24th Internatioal Conference on VLSI Design\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-01-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 24th Internatioal Conference on VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSID.2011.42\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 24th Internatioal Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2011.42","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hazard-Aware Directed Transition Fault ATPG for Effective Critical Path Test
Aggressive speed and voltage binning schemes are widely used in the industry to combat process variation. Generating structural tests that are effective for speed and voltage binning is very important to reduce cost and improve quality. We observe that hazards are common along critical paths of many industrial designs and conventional path-delay ATPG is ineffective for paths with static hazards. We propose a directed transition fault ATPG scheme that works with commercial ATPG tools to test the critical paths with hazards. The proposed scheme is implemented on industrial designs and silicon results are presented.