单元:统一张紧指令编译

Jian Weng, Animesh Jain, Jie Wang, Leyuan Wang, Yida Wang, Tony Nowatzki
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引用次数: 21

摘要

由于深度神经网络对密集计算的需求日益增加,研究人员开发了硬件和软件机制来减少计算和内存负担。一种广泛采用的方法是使用混合精度数据类型。然而,由于数据强制转换的开销,如果没有硬件专门化,就很难从混合精度中获益。最近,硬件供应商提供了专门用于混合精度张量操作的张量化指令,如Intel VNNI、Nvidia tensor Core和ARM DOT。这些指令涉及到一种新的计算习惯,它将多个低精度元素简化为一个高精度元素。由于缺乏针对这种新兴成语的编译技术,因此很难利用这些指令。在实践中,一种方法是为计算密集型内核使用供应商提供的库,但这是不灵活的,并且会妨碍进一步的优化。另一种方法是手动编写硬件内部函数,这种方法容易出错,对程序员来说也很困难。以前的一些作品试图通过为每个指令创建编译器来解决这个问题。当涉及到许多张拉指令时,这需要过多的努力。在这项工作中,我们开发了一个编译器框架UNIT,以统一对张紧指令的编译。这种方法的关键是统一的语义抽象,它使新指令的集成变得容易,并使分析和转换的重用成为可能。来自不同平台的张紧指令可以通过UNIT编译,只需适度的努力即可获得良好的性能。给定一条张量化指令和一个张量操作,UNIT自动检测该指令的适用性,变换该操作的循环组织,并重写循环体以利用张量化指令。根据我们的评估,UNIT能够针对各种主流硬件平台。生成的端到端推理模型在x86 CPU上比Intel oneDNN加速1.3倍,在Nvidia GPU上比Nvidia cuDNN加速1.75倍,在ARM CPU上比精心调整的ARM DOT TVM解决方案加速1.13倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
UNIT: Unifying Tensorized Instruction Compilation
Because of the increasing demand for intensive computation in deep neural networks, researchers have developed both hardware and software mechanisms to reduce the compute and memory burden. A widely adopted approach is to use mixed precision data types. However, it is hard to benefit from mixed precision without hardware specialization because of the overhead of data casting. Recently, hardware vendors offer tensorized instructions specialized for mixed-precision tensor operations, such as Intel VNNI, Nvidia Tensor Core, and ARM DOT. These instructions involve a new computing idiom, which reduces multiple low precision elements into one high precision element. The lack of compilation techniques for this emerging idiom makes it hard to utilize these instructions. In practice, one approach is to use vendor-provided libraries for computationally-intensive kernels, but this is inflexible and prevents further optimizations. Another approach is to manually write hardware intrinsics, which is error-prone and difficult for programmers. Some prior works tried to address this problem by creating compilers for each instruction. This requires excessive efforts when it comes to many tensorized instructions. In this work, we develop a compiler framework, UNIT, to unify the compilation for tensorized instructions. The key to this approach is a unified semantics abstraction which makes the integration of new instructions easy, and the reuse of the analysis and transformations possible. Tensorized instructions from different platforms can be compiled via UNIT with moderate effort for favorable performance. Given a tensorized instruction and a tensor operation, UNIT automatically detects the applicability of the instruction, transforms the loop organization of the operation, and rewrites the loop body to take advantage of the tensorized instruction. According to our evaluation, UNIT is able to target various mainstream hardware platforms. The generated end-to-end inference model achieves 1.3 x speedup over Intel oneDNN on an x86 CPU, 1.75x speedup over Nvidia cuDNN on an Nvidia GPU, and 1.13x speedup over a carefully tuned TVM solution for ARM DOT on an ARM CPU.
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