基于位并行乘法的64点流水线FFT处理器的OFDM应用

Bhawna Kalra, J. B. Sharma
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引用次数: 0

摘要

正交频分多址是用小载波速率传输单个数据流的一种技术。OFDM系统需要FFT处理器来生成子载波。介绍了一种基于Radix-2的32位64点流水线FFT处理器,该处理器采用位并行乘法处理,适用于OFDM系统。该架构采用单路径延迟反馈FFT架构。这是一个无ROM架构。在该体系结构中,用复常数乘法器代替ROM,并使用位并行乘法模块对所有中间因子进行相乘。流水线方法为FFT处理器提供了良好的延迟。在Xilinx ISE模拟器上,利用试验台波形计算出该架构在10ns时钟周期内的传输延迟为630ns。由于传输延迟小,OFDM系统的传输速度得到提高,延迟也得到改善。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Bit parallel multiplication based 64 Point Pipeline FFT Processor for OFDM application
Orthogonal frequency division multiple access is a technique in which single data stream is transmitted with small rate of subcarriers. OFDM system needs FFT processor for generation of subcarriers. A Radix-2 Based 32 bit and 64 Point Pipeline FFT Processor Using bit parallel multiplication process for OFDM system is presented in this paper. Proposed architecture uses single path delay feedback FFT architecture. This is an ROM less architecture. In this architecture ROM is replaced by complex constant multiplier and all twiddle factors are multiplied using bit parallel multiplication module. Pipelining methodology provides good latency to the FFT processor. Propagation delay of proposed architecture is calculated by test bench waveform on Xilinx ISE simulator and it is equal to 630ns at 10ns clock period. Due to small propagation delay speed of the OFDM system gets increases and latency also gets improve.
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