安全相关模拟输入容错选通器的设计

Hongzhou Yu, Aidong Xu
{"title":"安全相关模拟输入容错选通器的设计","authors":"Hongzhou Yu, Aidong Xu","doi":"10.1109/ICACTE.2010.5579381","DOIUrl":null,"url":null,"abstract":"This paper introduces a voting scheme for safety-related analog input module to arbitrate between the results of redundant channels in fault-tolerant system. The design approach is a distributed system using a sophisticated form of duplication. For each running process, there is a backup process running on a different CPU. The voter is responsible for checkpointing its state to duplex CPUs. In order to increase the dependability for safety-related controllers, the I/O modules use redundancy to reduce the risk associated with relying upon any single component operating flawlessly. The 1oo2D voting principle is commonly used in fault tolerant I/O modules to provide passive redundancy for masking runtime faults at hardware and software levels, respectively. A dual architecture (1oo2D) which provides high safety integrity to a rating of SIL 3 is presented. The outputs from two identical channels operating in parallel with the same inputs are supplied to a voting unit that arbitrates between them to produce an overall output. Based on the hardware logic model and FPGA technique, the study adopts the hardware voter which has much more advantage in the velocity and reliability. Finally, using modelsim simulations, we verify the effectiveness of the proposed voter design in preserving the hazard-free property of the response of an analog inputs module.","PeriodicalId":255806,"journal":{"name":"2010 3rd International Conference on Advanced Computer Theory and Engineering(ICACTE)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-09-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Design of a fault-tolerant voter for safety related analog inputs\",\"authors\":\"Hongzhou Yu, Aidong Xu\",\"doi\":\"10.1109/ICACTE.2010.5579381\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces a voting scheme for safety-related analog input module to arbitrate between the results of redundant channels in fault-tolerant system. The design approach is a distributed system using a sophisticated form of duplication. For each running process, there is a backup process running on a different CPU. The voter is responsible for checkpointing its state to duplex CPUs. In order to increase the dependability for safety-related controllers, the I/O modules use redundancy to reduce the risk associated with relying upon any single component operating flawlessly. The 1oo2D voting principle is commonly used in fault tolerant I/O modules to provide passive redundancy for masking runtime faults at hardware and software levels, respectively. A dual architecture (1oo2D) which provides high safety integrity to a rating of SIL 3 is presented. The outputs from two identical channels operating in parallel with the same inputs are supplied to a voting unit that arbitrates between them to produce an overall output. Based on the hardware logic model and FPGA technique, the study adopts the hardware voter which has much more advantage in the velocity and reliability. Finally, using modelsim simulations, we verify the effectiveness of the proposed voter design in preserving the hazard-free property of the response of an analog inputs module.\",\"PeriodicalId\":255806,\"journal\":{\"name\":\"2010 3rd International Conference on Advanced Computer Theory and Engineering(ICACTE)\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-09-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 3rd International Conference on Advanced Computer Theory and Engineering(ICACTE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICACTE.2010.5579381\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 3rd International Conference on Advanced Computer Theory and Engineering(ICACTE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICACTE.2010.5579381","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

介绍了一种容错系统中安全相关模拟输入模块的投票方案,用以在冗余信道的结果之间进行仲裁。设计方法是使用复杂的复制形式的分布式系统。对于每个正在运行的进程,都有一个备份进程在不同的CPU上运行。投票人负责将其状态检查点到双工cpu。为了提高与安全相关的控制器的可靠性,I/O模块使用冗余来降低依赖任何单个组件完美运行的风险。102d投票原则通常用于容错I/O模块,以提供被动冗余,分别在硬件和软件级别屏蔽运行时故障。提出了一种双重结构(102d),它提供了高安全完整性,等级为SIL 3。来自两个相同通道的输出与相同的输入并行操作,被提供给投票单元,该单元在它们之间进行仲裁,以产生总体输出。在硬件逻辑模型和FPGA技术的基础上,采用了在速度和可靠性方面更有优势的硬件投票器。最后,使用modelsim仿真,我们验证了所提出的选民设计在保持模拟输入模块响应的无危险特性方面的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of a fault-tolerant voter for safety related analog inputs
This paper introduces a voting scheme for safety-related analog input module to arbitrate between the results of redundant channels in fault-tolerant system. The design approach is a distributed system using a sophisticated form of duplication. For each running process, there is a backup process running on a different CPU. The voter is responsible for checkpointing its state to duplex CPUs. In order to increase the dependability for safety-related controllers, the I/O modules use redundancy to reduce the risk associated with relying upon any single component operating flawlessly. The 1oo2D voting principle is commonly used in fault tolerant I/O modules to provide passive redundancy for masking runtime faults at hardware and software levels, respectively. A dual architecture (1oo2D) which provides high safety integrity to a rating of SIL 3 is presented. The outputs from two identical channels operating in parallel with the same inputs are supplied to a voting unit that arbitrates between them to produce an overall output. Based on the hardware logic model and FPGA technique, the study adopts the hardware voter which has much more advantage in the velocity and reliability. Finally, using modelsim simulations, we verify the effectiveness of the proposed voter design in preserving the hazard-free property of the response of an analog inputs module.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信