{"title":"基于ZYNQ的信号处理系统软定义无线电硬件设计","authors":"Zhaojun Yang, Weibo Xiong, Yuxian Zhao","doi":"10.1109/ISNE.2019.8896380","DOIUrl":null,"url":null,"abstract":"This paper introduces a design scheme of a software defined radio (SDR) processing platform based on ZYNQ7000 and AD9371. Supports signal acquisition and processing in the 300MHz-6000MHz tunable range with up to 100 MHz bandwidths. The system was implemented on a 160mm*100mm board, greatly reducing the number of chips and PCB layout space. The transceiver performance of the system was tested and verified, especially spurious suppression and IQ balance.","PeriodicalId":405565,"journal":{"name":"2019 8th International Symposium on Next Generation Electronics (ISNE)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Software Defined Radio Hardware Design on ZYNQ for Signal Processing System\",\"authors\":\"Zhaojun Yang, Weibo Xiong, Yuxian Zhao\",\"doi\":\"10.1109/ISNE.2019.8896380\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces a design scheme of a software defined radio (SDR) processing platform based on ZYNQ7000 and AD9371. Supports signal acquisition and processing in the 300MHz-6000MHz tunable range with up to 100 MHz bandwidths. The system was implemented on a 160mm*100mm board, greatly reducing the number of chips and PCB layout space. The transceiver performance of the system was tested and verified, especially spurious suppression and IQ balance.\",\"PeriodicalId\":405565,\"journal\":{\"name\":\"2019 8th International Symposium on Next Generation Electronics (ISNE)\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 8th International Symposium on Next Generation Electronics (ISNE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISNE.2019.8896380\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 8th International Symposium on Next Generation Electronics (ISNE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISNE.2019.8896380","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Software Defined Radio Hardware Design on ZYNQ for Signal Processing System
This paper introduces a design scheme of a software defined radio (SDR) processing platform based on ZYNQ7000 and AD9371. Supports signal acquisition and processing in the 300MHz-6000MHz tunable range with up to 100 MHz bandwidths. The system was implemented on a 160mm*100mm board, greatly reducing the number of chips and PCB layout space. The transceiver performance of the system was tested and verified, especially spurious suppression and IQ balance.
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