Xianquan Wang, Min Wu, Jiqin Feng, Cun Dong, Lina Lou
{"title":"基于FPGA的感应同步器信号处理研究","authors":"Xianquan Wang, Min Wu, Jiqin Feng, Cun Dong, Lina Lou","doi":"10.1109/ICICIP.2010.5565232","DOIUrl":null,"url":null,"abstract":"In order to improve reliability of Inductosyn signal processing system and save FPGA resources, the article uses a single-chip SOC system design, making the sine/cosine signal power, pulse filling phase detection and data processing integrated into an FPGA, and optimizing the signal circuit of sine / cosine through the technology of point symmetry and axial symmetry. Research on the circuit of pulsed filling phase detection, it be used to detect two singles of the phase difference and the period . Design NIOS and its interface circuits, it can detect the angle of Inductosyn, and amend the angle error with software. Experiments indicated that the designing circuit and signal processing method are correct, only need the table of 0° ~90° degrees to respectively generate the 0° ~360° sine and cosine signals, save resources of FPGA; At the same time, focus the signal generating, pulse filling phase detection, NIOS microprocessor and display interface on the FPGA, improved the reliability of system.","PeriodicalId":152024,"journal":{"name":"2010 International Conference on Intelligent Control and Information Processing","volume":"58 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Research on signal processing of inductosyn based on FPGA\",\"authors\":\"Xianquan Wang, Min Wu, Jiqin Feng, Cun Dong, Lina Lou\",\"doi\":\"10.1109/ICICIP.2010.5565232\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In order to improve reliability of Inductosyn signal processing system and save FPGA resources, the article uses a single-chip SOC system design, making the sine/cosine signal power, pulse filling phase detection and data processing integrated into an FPGA, and optimizing the signal circuit of sine / cosine through the technology of point symmetry and axial symmetry. Research on the circuit of pulsed filling phase detection, it be used to detect two singles of the phase difference and the period . Design NIOS and its interface circuits, it can detect the angle of Inductosyn, and amend the angle error with software. Experiments indicated that the designing circuit and signal processing method are correct, only need the table of 0° ~90° degrees to respectively generate the 0° ~360° sine and cosine signals, save resources of FPGA; At the same time, focus the signal generating, pulse filling phase detection, NIOS microprocessor and display interface on the FPGA, improved the reliability of system.\",\"PeriodicalId\":152024,\"journal\":{\"name\":\"2010 International Conference on Intelligent Control and Information Processing\",\"volume\":\"58 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-09-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Conference on Intelligent Control and Information Processing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICIP.2010.5565232\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Intelligent Control and Information Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICIP.2010.5565232","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Research on signal processing of inductosyn based on FPGA
In order to improve reliability of Inductosyn signal processing system and save FPGA resources, the article uses a single-chip SOC system design, making the sine/cosine signal power, pulse filling phase detection and data processing integrated into an FPGA, and optimizing the signal circuit of sine / cosine through the technology of point symmetry and axial symmetry. Research on the circuit of pulsed filling phase detection, it be used to detect two singles of the phase difference and the period . Design NIOS and its interface circuits, it can detect the angle of Inductosyn, and amend the angle error with software. Experiments indicated that the designing circuit and signal processing method are correct, only need the table of 0° ~90° degrees to respectively generate the 0° ~360° sine and cosine signals, save resources of FPGA; At the same time, focus the signal generating, pulse filling phase detection, NIOS microprocessor and display interface on the FPGA, improved the reliability of system.