神经网络启发的模数转换在低精度RRAM器件上实现超分辨率

Weidong Cao, Liu Ke, Ayan Chakrabarti, Xuan Zhang
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引用次数: 9

摘要

最近的研究提出了神经网络(NN)启发的模数转换器(NNADCs),并展示了它们在许多新兴应用中的巨大潜力。这些nnadc通常依赖于电阻随机存取存储器(RRAM)器件来实现神经网络操作,并且需要高精度RRAM单元(6 ~ 12位)来实现中等量化分辨率(4 ~ 8位)。然而,大规模生产过程中RRAM阵列的制造数据并不支持这种对RRAM分辨率的乐观假设。在本文中,我们提出了一种基于低精度RRAM器件的受神经网络启发的超分辨率ADC,该ADC利用了将流水线硬件架构与自定义神经网络训练框架相结合的协同设计方法。SPICE仿真结果表明,我们的方法可以实现使用3位RRAM器件的14位超分辨率ADC的稳健设计,并具有更高的功率和速度性能以及具有竞争力的优势值(FoMs)。除了线性均匀量化外,所提出的ADC还可以支持高转换速度和低转换能量的可配置高分辨率非线性量化,为近传感器分析和处理提供未来智能模拟-信息接口。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Neural Network-Inspired Analog-to-Digital Conversion to Achieve Super-Resolution with Low-Precision RRAM Devices
Recent works propose neural network- (NN-) inspired analog-to-digital converters (NNADCs) and demonstrate their great potentials in many emerging applications. These NNADCs often rely on resistive random-access memory (RRAM) devices to realize the NN operations and require high-precision RRAM cells (6∼12-bit) to achieve a moderate quantization resolution (4∼8-bit). Such optimistic assumption of RRAM resolution, however, is not supported by fabrication data of RRAM arrays in large-scale production process. In this paper, we propose an NN-inspired super-resolution ADC based on low-precision RRAM devices by taking the advantage of a co-design methodology that combines a pipelined hardware architecture with a custom NN training framework. Results obtained from SPICE simulations demonstrate that our method leads to robust design of a 14-bit super-resolution ADC using 3-bit RRAM devices with improved power and speed performance and competitive figure-of-merits (FoMs). In addition to the linear uniform quantization, the proposed ADC can also support configurable high-resolution nonlinear quantization with high conversion speed and low conversion energy, enabling future intelligent analog-to-information interfaces for near-sensor analytics and processing.
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