基于45纳米CMOS的高效低功耗R-2R DAC

S. Rajendra Prasad, Namani Kavya Sree, Kondra Omkumar, Kothapalli Srujana
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引用次数: 0

摘要

数模转换器(DAC)的主要用途是充当数字设备和模拟设备之间的接口。它将二进制数字值(0,1)转换成一系列模拟电压。每种类型的DAC都有自己的优点和缺点,不可能在一个电路中实现所有积极的方面。考虑到功耗、分辨率等不同参数,我们设计了一个基于4位CMOS的45纳米R-2R DAC。在本文中,我们使用两级运算放大器(opamp)来提高R-2R DAC的性能。一个差分放大级和一个增益级构成两级运放,调用两个电阻R和2R的值构成R-2R阶梯网络。该两级运放和4位R-2R阶梯网络一起用于设计4位R-2R DAC。然后使用Synopsys H-spice工具对该DAC进行仿真,并根据仿真结果,考虑精度积分非线性(INL)和微分非线性(DNL)误差、分辨率、平均、静态和动态功率以及沉降时间等参数进行分析。所提出的R-2R DAC具有低功耗、低INL、低DNL误差的特点,与相关工作相比,具有较高的效率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Efficient and Low Power 45nm CMOS Based R-2R DAC
The main purpose of the Digital to Analog converter (DAC) is to act as an interface between the digital device and the analog device. Which converts the binary digital values(0,1) into a series of analog voltages. Each type of DAC has its own set of advantages and disadvantages, It is not possible to attain all positive aspects in one circuit. By considering different parameters like power, resolution etc., we have designed a 4-bit CMOS based R-2R DAC in 45nm technology. In this paper, we are using two stage operational amplifier(opamp) in order to enhance the performance of the R-2R DAC. A differential amplifier stage and a gain stage form the two stage opamp, and two values of resistors R and 2R are invoked to form the R-2R ladder network. This two stage opamp and 4-bit R-2R ladder network are used together to design a 4-bit R-2R DAC. Then This DAC is simulated using the Synopsys H-spice tool and based on the simulation results, analysis is performed by considering various parameters like accuracy-Integral nonlinearity (INL) and Differential nonlinearity(DNL) errors, resolution, average, static, and dynamic powers, and settling time. The proposed R-2R DAC has low power and less INL, and DNL errors which are efficient when compared with the related work.
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