基于储层的射频数据边缘训练,以提供智能高效的物联网频谱传感器

S. Kokalj-Filipovic, P. Toliver, William Johnson, Rob Miller
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引用次数: 2

摘要

目前边缘的射频(RF)传感器缺乏计算资源来支持智能频谱监测的实际现场培训。一般来说,这对于传感器数据分类来说是正确的。我们提出了一种通过深度延迟环路水库计算(DLR)的解决方案,DLR是一种处理架构,通过利用延迟环路水库计算与创新的光电硬件相结合,支持紧凑型移动设备上的通用机器学习算法。与最先进的(SoA)相比,DLR环路设计的数字和光子实现减少了外形尺寸,硬件复杂性和延迟。水库的主要作用是将输入数据投影到水库状态向量的高维空间中,以便线性分离输入类。一旦这些类被很好地分离,学习过程就不再需要传统上复杂、耗电的分类模型。然而,即使使用基于Ridge回归(RR)的简单分类器,复杂度也至少会随着输入大小呈二次增长。因此,在紧凑设备上训练所需的硬件缩减与状态向量的大维数是矛盾的。DLR使用基于rr的分类器来超越SoA精度,同时通过利用并行(分裂)循环的架构进一步降低功耗。我们提出了由多个较小回路组成的DLR架构,这些回路的状态向量被线性组合以创建Ridge回归的低维输入。我们展示了在两个不同的应用中使用DLR的优势:用于物联网认证的射频特定发射器识别(SEI)和用于物联网态势感知的无线协议识别。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Reservoir Based Edge Training on RF Data To Deliver Intelligent and Efficient IoT Spectrum Sensors
Current radio frequency (RF) sensors at the Edge lack the computational resources to support practical, in-situ training for intelligent spectrum monitoring. This is true for sensor data classification in general. We propose a solution via Deep Delay Loop Reservoir Computing (DLR), a processing architecture that supports general machine learning algorithms on compact mobile devices by leveraging delay-loop reservoir computing in combination with innovative electro-optical hardware. With both digital and photonic realizations of our design of the loops, DLR delivers reductions in form factor, hardware complexity and latency, compared to the State-of-the-Art (SoA). The main impact of the reservoir is to project the input data into a higher dimensional space of reservoir state vectors in order to linearly separate the input classes. Once the classes are well separated, traditionally complex, power-hungry classification models are no longer needed for the learning process. Yet, even with simple classifiers based on Ridge regression (RR), the complexity grows at least quadratically with the input size. Hence, the hardware reduction required for training on compact devices is in contradiction with the large dimension of state vectors. DLR employs a RR-based classifier to exceed the SoA accuracy, while further reducing power consumption by leveraging the architecture of parallel (split) loops. We present DLR architectures composed of multiple smaller loops whose state vectors are linearly combined to create a lower dimensional input into Ridge regression. We demonstrate the advantages of using DLR for two distinct applications: RF Specific Emitter Identification (SEI) for IoT authentication, and wireless protocol recognition for IoT situational awareness.
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