基于行为建模的CMOS图像传感器一阶Sigma-Delta调制器性能评估

Sergio Garduza-González
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引用次数: 0

摘要

所研究的片上系统是一种拟议的CMOS图像传感器(CIS)架构,其中包括:无源像素阵列,行/列数字开关和每四列一个一阶单比特Sigma-Delta调制器。本文提出了σ - δ调制器的行为模型,从信噪比和动态范围两个方面对其性能进行了评价。该模型从一个理想调制器开始,然后加入噪声源和由光源和调制器的非理想性引起的非线性畸变。所有的建模都是在系统级开发的。用室室模型获得的性能与直接从CIS获得的时间测量结果一致。该模型可以确定降低性能的主要噪声源。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Performance Estimation of a First-Order Sigma-Delta Modulator in a CMOS Image Sensor Using Behavioral Modeling
The system-on-chip of study is a proposed CMOS Image Sensor (CIS) architecture which includes: passive pixel array, digital switches for rows/columns and a first-order single-bit Sigma-Delta Modulator for every four columns. This paper presents the behavioral model of the Sigma-Delta Modulator, to estimate their performance in terms of Signal to Noise Ratio and Dynamic Range. The model starts with an ideal modulator, and then are added noise sources and nonlinear distortions, arose by the light source and the modulator non-idealities. All modeling was developed at system level. The performance obtained with the compartmental model showed good agreement with the temporal measurements obtained directly from CIS. This model allows determining the main noise sources that degrade the performance.
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