{"title":"一种可重构的连续时间递归神经网络","authors":"J. Gallagher, S. Boddhu, S. Vigraham","doi":"10.1109/CEC.2005.1555002","DOIUrl":null,"url":null,"abstract":"Evolvable hardware is reconfigurable hardware plus an evolutionary algorithm. Continuous time recurrent neural networks (CTRNNs) have been proposed for use as the reconfigurable hardware component. Until recently, however, nearly all CTRNN based EH was simulation based. This poster details a design for a reconfigurable analog CTRNN computer that supports both extrinsic and intrinsic CTRNN evolvable hardware.","PeriodicalId":448208,"journal":{"name":"2005 NASA/DoD Conference on Evolvable Hardware (EH'05)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A reconfigurable continuous time recurrent neural network for evolvable hardware applications\",\"authors\":\"J. Gallagher, S. Boddhu, S. Vigraham\",\"doi\":\"10.1109/CEC.2005.1555002\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Evolvable hardware is reconfigurable hardware plus an evolutionary algorithm. Continuous time recurrent neural networks (CTRNNs) have been proposed for use as the reconfigurable hardware component. Until recently, however, nearly all CTRNN based EH was simulation based. This poster details a design for a reconfigurable analog CTRNN computer that supports both extrinsic and intrinsic CTRNN evolvable hardware.\",\"PeriodicalId\":448208,\"journal\":{\"name\":\"2005 NASA/DoD Conference on Evolvable Hardware (EH'05)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 NASA/DoD Conference on Evolvable Hardware (EH'05)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CEC.2005.1555002\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 NASA/DoD Conference on Evolvable Hardware (EH'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CEC.2005.1555002","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A reconfigurable continuous time recurrent neural network for evolvable hardware applications
Evolvable hardware is reconfigurable hardware plus an evolutionary algorithm. Continuous time recurrent neural networks (CTRNNs) have been proposed for use as the reconfigurable hardware component. Until recently, however, nearly all CTRNN based EH was simulation based. This poster details a design for a reconfigurable analog CTRNN computer that supports both extrinsic and intrinsic CTRNN evolvable hardware.