100gbit /s光传输网络40nm测试芯片设计与原型制作

2017 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC) Pub Date : 2017-08-01 DOI:10.1109/IMOC.2017.8121108

Eduardo Mobilen, R. Bernardo, L. R. Monte

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引用次数: 4

摘要

这项工作报告了100 Gbit/s OTN 40 nm测试芯片的设计和原型，该芯片是CPqD为巴西电信行业开发的OTN处理器设备的测试载体策略。本文涵盖了与第三方硅知识产权解决方案集成相关的主要问题，以及测试芯片成功验证的评估环境。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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100 Gbit/s optical transport network 40 nm test chip design and prototyping

This work reports the design and prototyping of a 100 Gbit/s OTN 40 nm test chip, manufactured as a test vehicle strategy for an OTN processor device under development at CPqD for the Brazilian telecom industry. The main issues related to the integration of third-party silicon intellectual property solutions are covered, together with the evaluation environment where the test chip was successfully validated.

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来源期刊

2017 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC)

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