Performance optimization of VLSI transceivers for low-energy communications systems

Design of low-energy communications systems requires attention to power consumption in the overall system design and the algorithm implementations. We consider design of a communications system incorporating digital transmission and receiver filters, and error-control coding. Various well-known channel codes including turbo codes, block codes, and convolutional codes are studied. For each of these decoders, its decoding performance and power consumption are evaluated from VLSI chip designs. We then demonstrate optimization of a simple design from a total system perspective.