Back-pressure buffering scheme to improve the cell loss property on the output buffered ATM switch

We have studied back-pressure buffering mechanisms to improve the cell loss property in output buffered ATM switches. In order to minimize the cell loss in an output buffer, the back-pressure buffering mechanism pressures the transmission of input cells to the switch fabric according to the load status of the output buffer. We have studied and proposed two back-pressure buffering mechanisms; one is the push-out mechanism with a single FIFO and the other is the selective pressure mechanism with a shared memory. The main subjects of this study were: (1) a performance comparison using computer simulation between a system without back-pressure buffering and a system with the proposed back-pressure schemes and (2) a proposal for a practical implementation structure. Through the simulation results, we conclude that a pure push-out mechanism cannot improve the performance but a selective pressure mechanism will provide enormous improvement of the cell loss property with a small sized memory.