具有字节码折叠和动态调度的Java处理器体系结构

2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233) Pub Date : 2001-08-26 DOI:10.1109/PACRIM.2001.953584

M. El-Kharashi, F. Elguibaly, K. Li

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引用次数: 1

摘要

本文提出了一种在硬件上执行Java字节码的新型处理器体系结构。我们的处理器基于指令折叠算法，该算法由Tomasulo的调度算法实现。该体系结构还提供双重处理能力来执行Java字节码和其他二进制文件。这种方法在不牺牲处理器通用性的情况下改进了Java的执行。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Java processor architecture with bytecode folding and dynamic scheduling

This paper presents a novel processor architecture for executing Java bytecodes in hardware. Our processor is based on an instruction folding algorithm implemented with Tomasulo's scheduling algorithm. The architecture also provides dual processing capability to execute Java bytecodes as well as other binaries. This approach improves Java execution without sacrificing the generality of the processor.

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2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233)

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